The present invention relates to a liquid crystal display device, and in particular to a low-voltage high-speed liquid crystal display device obtained by improving flatness of various thin films of an active matrix substrate fabricated using a polycrystalline silicon semiconductor formed by a laser annealing technique and a fabrication method thereof.
Liquid crystal display devices are widely used as display monitors in information processing terminals and video display devices of TV receivers. The liquid crystal display devices have a basic structure formed of a pair of insulating substrates and a liquid crystal layer contained therebetween, and display pictures or videos by changing orientations of liquid crystal molecules of the liquid crystal layer.
Various types of liquid crystal display devices are known which differ in a method of forming pixels. Among others, an active matrix type is widely adopted which disposes a switching element (an active element) at each pixel on an inner surface of one of a pair of insulating substrates and forms a display image by selecting some of the switching elements.
The most popular one of the active matrix type liquid crystal display devices is a thin film transistor (TFT) type liquid crystal display device which uses thin film transistors as the switching elements.
Recently, polycrystalline silicon semiconductor has been put to practical use as semiconductor layers constituting circuit elements such as thin film transistors and passive circuit components of the thin film transistor type liquid crystal display devices.
FIG. 8 is a schematic plan view of an active matrix substrate for explaining an example of a liquid crystal display device which uses polycrystalline silicon semiconductors. Reference character SUB1 denotes a first substrate (a lower substrate, an active matrix substrate), and scanning signal lines (gate lines) GL and video signal lines (drain lines) DL are arranged vertically and horizontally, respectively, in a display area AR. A thin film transistor TFT is disposed at each intersection of the scanning signal lines GL and the video signal lines DL, and a pixel electrode PT driven by one of the thin film transistors TFT forms a unit pixel.
Fabricated at the periphery of the display area AR on the substrate SUB1 are a vertical scanning drive circuit (a gate drive circuit) V for applying a scanning voltage to the gate lines GL, a horizontal scanning drive circuit (a drain drive circuit) H, and a precharge circuit PG.
Disposed at one side of the SUB1 is a terminal TM for receiving display signals from external equipment (a signal source such as a host computer or video signal processing equipment). Reference character COM denotes a terminal for applying a drive signal to a common electrode formed on the other insulating substrate (not shown).
To fabricate a polycrystalline silicon semiconductor film on an insulating substrate made of glass or quartz (hereinafter referred to merely as a substrate), a method has been generally used which forms an amorphous silicon film on the substrate using a technique such as CVD, then irradiates a laser beam onto the amorphous silicon film to melt locally the amorphous silicon film only and convert it into a polycrystalline silicon film at a temperature at which a low heat-resistance substrate such as a glass substrate is not melted or broken.
This method makes it possible to use relatively inexpensive glass as substrates, and thereby to reduce the cost of liquid crystal display devices and place high-quality liquid crystal display devices on the market.
The method is disclosed in Japanese Patent Application Laid-open No. Hei 10-41234 (laid-open on Feb. 13, 1998), for example, which forms an amorphous silicon film on a substrate using a technique such as CVD, then irradiates a laser beam onto the amorphous silicon film to form a polycrystalline silicon semiconductor film on a low heat-resistance substrate such as a glass substrate
The prior art disclosed by Japanese Patent Application Laid-open No. Hei 10-41234 forms a polycrystalline silicon film by irradiating a laser beam onto a single-layer amorphous silicon film only, but it does not teach a method which forms the second layer made of an amorphous silicon on the first layer made of a polycrystalline silicon film, and then grows crystals from the second layer made of the amorphous silicon film with the first layer made of the polycrystalline silicon film used as nucleuses by irradiating the laser beam onto the second layer of the amorphous silicon film.
Japanese Patent Application Laid-open No. Hei 11-40501 (laid-open Feb. 12, 1999) discloses a prior art which first forms a polycrystalline silicon film by irradiating a laser beam onto the first layer made of an amorphous silicon film, then forms the second layer made of an amorphous silicon film on the first layer made of the polycrystalline silicon film, and then convert the second layer made of the amorphous silicon film into a polycrystalline silicon film by irradiating a laser beam onto the second layer of the amorphous silicon film.
But, in the technique of Japanese Patent Application Laid-open No. Hei 10-41234, there was not a concept of removing impurities from the first layer made of the polycrystalline silicon film, therefore regions having large concentrations of impurities are present at an interface between the first and second layers made of the polycrystalline silicon films and the impurities hinder the polycrystalline silicon films of the first and second layers from melting together, and consequently, this made it difficult to obtain an integral polycrystalline silicon film having good crystal quality and free from boundaries between the first and second layers made of the polycrystalline silicon films.
The above-mentioned impurities are intended to mean the composition of air, dust particles floating in air, but not impurities intentionally introduced into the polycrystalline silicon film to determine the conductivity type of the polycrystalline silicon film, such as boron, phosphorus or arsenic.
Japanese Patent Application Laid-open No. Hei 7-99321 (laid-open on Apr. 11, 1995) discloses a technique which first forms the first layer made of a polycrystalline silicon film, then stack the second layer made of an amorphous silicon film on the first layer of the polycrystalline silicon film without exposing the polycrystalline film to the atmosphere, and then convert the second layer of the amorphous silicon film into a polycrystalline silicon film by irradiating a laser beam onto the amorphous silicon film.
But, in the technique of Japanese Patent Application Laid-open No. Hei 7-99321, there was not a concept of planarizing a surface of a polycrystalline silicon film, and therefore the technique did not include a cleaning process for removing protrusions produced in the first layer of the polycrystalline silicon film by irradiation of the laser beam before stacking the second layer of the amorphous silicon film on the first layer of the polycrystalline silicon film. Consequently, in the technique of Japanese Patent Application Laid-open No. Hei 7-99321, it was difficult to obtain a polycrystalline silicon film having a very flat surface, unlike the present invention.
In a polycrystalline silicon film fabricated by the above-mentioned prior art technique, large protrusions are produced between crystals when an amorphous silicon film is crystallized. Generally, the thickness of a polycrystalline silicon film is selected to be between 20 nm and 100 nm, the above-mentioned protrusions sometimes measure 50% to 200% of the formed film thickness, and consequently, the polycrystalline silicon film has a large number of protrusions rising above its surface.
FIG. 9 is a sketch reproduced from a micrograph of a structural cross section of stacked films at an essential part of a thin film transistor fabricated on an active matrix substrate constituting a prior art liquid crystal display device. The thin film transistor is of the MOS field-effect type.
In FIG. 9, reference character SUB1 denotes a substrate, PS is a polycrystalline silicon semiconductor layer, GI is a gate insulating layer, GT is a gate electrode, PAS is an interlayer insulator. As shown in FIG. 9, the polycrystalline silicon semiconductor layer PS has a large number of protrusions rising above its surface, and as a result, the cross sections of the gate insulating layer GI and the gate electrode GT stacked on the semiconductor layer PS conform generally to the surface conditions of the polycrystalline silicon semiconductor layer PS.
In the thin film transistor using as its semiconductor layer the polycrystalline silicon semiconductor film fabricated by the above-mentioned prior art technique, the following limitations are imposed on device structures and transistor operation, and as a result, transistor characteristics are deteriorated and consequently, display characteristics are degraded.
(1) To ensure an insulation between the polycrystalline silicon semiconductor layer and the gate electrode serving as an electric-field controlling layer, and a desired dielectric breakdown strength therebetween, it is necessary to make the gate insulator GI thick enough to cover the above-explained protrusions sufficiently. As a result, it is not possible to reduce the thickness of the gate insulator GI, and its thickness is usually selected to be about 100 nm.
(2) After the insulating film is fabricated as explained in (1), an impurity is sometimes introduced into the insulating film by a technique such as ion implantation to control a threshold voltage of the thin film transistor. The lateral distributions of impurity concentrations (e.g., a contour of an equal-impurity concentration approximated by a curve formed by connecting positions of peaks of the depth distributions of impurity concentrations) depends upon the shapes of the protrusions and the insulating film formed to cover the protrusions, and for example, the lateral distributions of impurity concentrations become uneven with respect to a horizontal plane (a surface of the substrate) when the insulating layer conforms very well to the underlying polycrystalline silicon semiconductor layer.
It is possible to form the insulating layer so as to absorb unevenness of the underlying polycrystalline silicon semiconductor layer and provide an even surface, but, in this case, the insulating layer often becomes thicker due to the conditions required in (1) above, and the thickness of the insulating layer varies greatly from position to position (not less than 20%) such that the variations produce a disadvantage of modulating locally the field effect by the gate electrode serving as an electric-field control electrode.
(3) Generally source and regions are formed by first forming the insulating layer as explained in (1) above, next coating an electrode material on the insulating layer and patterning the electrode material film into the gate electrode and then introducing impurities into the polycrystalline silicon film by a technique such as ion implantation. In this case also, a contour of an equal-impurity concentration becomes uneven and protrudent with respect to a surface of the substrate like the case of (2) above.
If the size of the protrusions is equal to or more than 50% of the thickness of the polycrystalline silicon semiconductor layer, local variations in impurity concentration occur along the current-flowing direction in the source or drain region and this makes it difficult to control a resistance in the source or drain region.
It is objects of the present invention to provide a liquid crystal display device having an active matrix substrate including stable low-voltage high-speed thin film transistors by solving the above-explained problems with the prior art and thereby reducing unevenness of the polycrystalline silicon semiconductor layer, making the insulating layer thinner and flattening the lateral distributions of impurity concentrations, and to provide a method of fabricating the liquid crystal display device.
The following are some representative configurations of liquid crystal display devices of the present invention for achieving the above objects:
In accordance with an embodiment of the present invention, there is provided a liquid crystal display device provided with a pixel area on a substrate having a plurality of gate lines, a plurality of drain lines, a plurality of thin film transistors, and a plurality of pixel electrodes corresponding to the plurality of thin film transistors, and a drive circuit area disposed at a periphery of the substrate and having a drive circuit for driving the plurality of thin film transistors, the plurality of thin film transistors comprising: a polycrystalline silicon semiconductor layer formed on the substrate, a gate electrode formed on the polycrystalline silicon semiconductor layer with a gate insulating film interposed therebetween, an insulating film to cover the polycrystalline silicon semiconductor layer, the gate insulating film and the gate electrode, a drain electrode formed on the insulating film and electrically connected to the polycrystalline silicon semiconductor layer, a source electrode formed on the insulating film, spaced from the drain electrode and electrically connected to the polycrystalline silicon semiconductor layer, unevenness of a surface of the polycrystalline silicon semiconductor layer being within 10% of a thickness of the polycrystalline silicon semiconductor layer, and variations of positions of peaks of depth distributions of concentration of impurities introduced into the polycrystalline silicon semiconductor layer to determine a conductivity type thereof being within 10% of the thickness of the polycrystalline silicon semiconductor layer, the positions of the peaks being measured from a surface of the substrate.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device provided with a pixel area on a substrate having a plurality of gate lines, a plurality of drain lines, a plurality of thin film transistors, and a plurality of pixel electrodes corresponding to the plurality of thin film transistors, and a drive circuit area disposed at a periphery of the substrate and having a drive circuit for driving the plurality of thin film transistors, the plurality of thin film transistors comprising: a polycrystalline silicon semiconductor layer formed on the substrate, a gate electrode formed on the polycrystalline silicon semiconductor layer with a gate insulating film interposed therebetween, an insulating film to cover the polycrystalline silicon semiconductor layer, the gate insulating film and the gate electrode, a drain electrode formed on the insulating film and electrically connected to the polycrystalline silicon semiconductor layer, and a source electrode formed on the insulating film, spaced from the drain electrode and electrically connected to the polycrystalline silicon semiconductor layer, unevenness of a surface of the polycrystalline silicon semiconductor layer being within 10% of a thickness of the polycrystalline silicon semiconductor layer.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device provided with a pixel area on a substrate having a plurality of gate lines, a plurality of drain lines, a plurality of thin film transistors and a plurality of pixel electrodes corresponding to the plurality of thin film transistors, and a drive circuit area disposed at a periphery of the substrate and having a drive circuit for driving the plurality of thin film transistors, the plurality of thin film transistors comprising: a polycrystalline silicon semiconductor layer formed on the substrate, a gate electrode formed on the polycrystalline silicon semiconductor layer with a gate insulating film interposed therebetween, an insulating film to cover the polycrystalline silicon semiconductor layer, the gate insulating film and the gate electrode, a drain electrode formed on the insulating film and electrically connected to the polycrystalline silicon semiconductor layer, and a source electrode formed on the insulating film, spaced from the drain electrode and electrically connected to the polycrystalline silicon semiconductor layer, variations of positions of peaks of depth distributions of concentration of impurities introduced into the polycrystalline silicon semiconductor layer to determine a conductivity type thereof being within 10% of the thickness of the polycrystalline silicon semiconductor layer, the positions of the peaks being measured from a surface of the substrate.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising a first substrate having a pixel electrode thereon and a thin film transistor coupled to the pixel electrode, a second substrate having a common electrode disposed thereon to face the pixel electrode, and a liquid crystal layer sealed between the first and second substrates, the thin film transistor comprising: a polycrystalline silicon semiconductor layer formed on the first substrate, a gate electrode formed on the polycrystalline silicon semiconductor layer with a gate insulating film interposed therebetween, an insulating film formed to cover the polycrystalline silicon semiconductor layer, the gate insulating film and the gate electrode, a drain electrode formed on the insulating film and electrically connected to the polycrystalline silicon semiconductor layer, and a source electrode formed on the insulating film, spaced from the drain electrode and electrically connected to the polycrystalline silicon semiconductor layer, the polycrystalline silicon semiconductor layer being composed of a first polycrystalline silicon semiconductor film and a second polycrystalline silicon semiconductor film, the first polycrystalline silicon semiconductor film being formed on the first substrate by laser annealing, having a thickness equal to or less than 50 nm, and having unevenness of a surface thereof within 10% of a thickness of the polycrystalline silicon semiconductor layer, the second polycrystalline silicon semiconductor film being formed by depositing and then laser annealing an amorphous silicon semiconductor film of 50 nm or less in thickness on the first polycrystalline silicon semiconductor film, and a concentration of oxygen at an interface and its vicinities between the first and second polycrystalline silicon semiconductor films being equal to or less than 1019 atoms/cm3.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising a first substrate having a pixel electrode thereon and a thin film transistor coupled to the pixel electrode, a second substrate having a common electrode disposed thereon to face the pixel electrode, and a liquid crystal layer sealed between the first and second substrates, the thin film transistor comprising: a polycrystalline silicon semiconductor layer formed on the first substrate, a gate electrode formed on the polycrystalline silicon semiconductor layer with a gate insulating film interposed therebetween, an insulating film formed to cover the polycrystalline silicon semiconductor layer, the gate insulating film and the gate electrode, a drain electrode formed on the insulating film and electrically connected to the polycrystalline silicon semiconductor layer, and a source electrode formed on the insulating film, spaced from the drain electrode and electrically connected to the polycrystalline silicon semiconductor layer, the polycrystalline silicon semiconductor layer being composed of a first polycrystalline silicon semiconductor film and a second polycrystalline silicon semiconductor film, the first polycrystalline silicon semiconductor film being formed on the first substrate by laser annealing, having a thickness equal to or less than 50 nm, and having unevenness of a surface thereof within 10% of a thickness of the polycrystalline silicon semiconductor layer, the second polycrystalline silicon semiconductor film being formed by depositing and then laser annealing an amorphous silicon semiconductor film of 50 nm or less in thickness on the first polycrystalline silicon semiconductor film, and peaks of depth distribution of concentration of oxygen are not at an interface or its vicinities between the first and second polycrystalline silicon semiconductor films.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device provided with a pixel area on a substrate having a plurality of gate lines, a plurality of drain lines, a plurality of thin film transistors, and a plurality of pixel electrodes corresponding to the plurality of thin film transistors, and a drive circuit area disposed at a periphery of the substrate and having a drive circuit for driving the plurality of thin film transistors, the thin film transistors comprising: a polycrystalline silicon semiconductor layer formed on the substrate, a gate electrode formed on the polycrystalline silicon semiconductor layer with a gate insulating film interposed therebetween, an insulating film formed to cover the polycrystalline silicon semiconductor layer, the gate insulating film and the gate electrode, a drain electrode formed on the insulating film and electrically connected to the polycrystalline silicon semiconductor layer, and a source electrode formed on the insulating film, spaced from the drain electrode and electrically connected to the polycrystalline silicon semiconductor layer, the polycrystalline silicon semiconductor layer being composed of a first polycrystalline silicon semiconductor film and a second polycrystalline silicon semiconductor film, the first polycrystalline silicon semiconductor film being formed on the substrate by laser annealing, having a thickness equal to or less than 50 nm, and having unevenness of a surface thereof within 10% of a thickness of the polycrystalline silicon semiconductor layer, the second polycrystalline silicon semiconductor film being formed on the first polycrystalline silicon semiconductor film by depositing and then laser annealing an amorphous silicon semiconductor film of 50 nm or less in thickness on the first polycrystalline silicon semiconductor film, and a concentration of nitrogen at an interface and its vicinities between the first and second polycrystalline silicon semiconductor films being equal to or less than 1019 atoms/cm3.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device provided with a pixel area on a substrate having a plurality of gate lines, a plurality of drain lines, a plurality of thin film transistors, and a plurality of pixel electrodes corresponding to the plurality of thin film transistors, and a drive circuit area disposed at a periphery of the substrate and having a drive circuit for driving the plurality of thin film transistors, the thin film transistors comprising: a polycrystalline silicon semiconductor layer formed on the substrate, a gate electrode formed on the polycrystalline silicon semiconductor layer with a gate insulating film interposed therebetween, an insulating film formed to cover the polycrystalline silicon semiconductor layer, the gate insulating film and the gate electrode, a drain electrode formed on the insulating film and electrically connected to the polycrystalline silicon semiconductor layer, and a source electrode formed on the insulating film, spaced from the drain electrode and electrically connected to the polycrystalline silicon semiconductor layer, the polycrystalline silicon semiconductor layer being composed of a first polycrystalline silicon semiconductor film and a second polycrystalline silicon semiconductor film, the first polycrystalline silicon semiconductor film being formed on the substrate by laser annealing, having a thickness equal to or less than 50 nm, and having unevenness of a surface thereof within 10% of a thickness of the polycrystalline silicon semiconductor layer, the second polycrystalline silicon semiconductor film being formed on the first polycrystalline silicon semiconductor film by depositing and then laser annealing an amorphous silicon semiconductor film of 50 nm or less in thickness on the first polycrystalline silicon semiconductor film, and peaks of depth distribution of concentration of nitrogen are not at an interface or its vicinities between the first and second polycrystalline silicon semiconductor films.
The above configurations provide liquid crystal display devices having an active matrix substrate including stable low-voltage high-speed thin film transistors. The various numerical limitations were obtained by the present inventors having carried out a large number of experiments.
In accordance with another embodiment of the present invention, there is a method of fabricating a liquid crystal display device provided with a pixel area on a substrate having a plurality of gate lines, a plurality of drain lines, a plurality of thin film transistors and a plurality of pixel electrodes corresponding to the plurality of thin film transistors, and a drive circuit area disposed at a periphery of the substrate and having a drive circuit for driving the plurality of thin film transistors, the method comprising the steps of: (a) forming a first amorphous silicon semiconductor film on the substrate and then converting the amorphous silicon semiconductor film into a first polycrystalline silicon semiconductor film by laser annealing, (b) cleaning a surface of the first polycrystalline silicon semiconductor film and thereby reducing an amount of an unintentional impurity on the surface of the first polycrystalline silicon semiconductor film to 1019 atoms/cm3 or less, (c) forming a second amorphous silicon semiconductor film on the first polycrystalline silicon semiconductor film and then converting the second amorphous silicon semiconductor film into a second polycrystalline silicon semiconductor film using crystals in the first polycrystalline silicon semiconductor film as nucleuses by laser annealing and thereby merging the second polycrystalline silicon semiconductor film with the first polycrystalline silicon semiconductor film into a polycrystalline silicon semiconductor layer, (d) patterning the polycrystalline silicon semiconductor layer into a thin-film-transistor polycrystalline silicon semiconductor layer, (e) forming a gate insulating layer on the thin-film-transistor polycrystalline silicon semiconductor layer, (f) forming a first electrode material film on the gate insulating layer and then patterning the first electrode material film into a gate electrode, (g) introducing impurities for determining a conductivity type into regions of the thin-film-transistor polycrystalline silicon semiconductor layer corresponding to a source electrode and a drain electrode, respectively, (h) forming an interlayer insulating layer to cover the gate electrode, (i) opening semiconductor-layer contact holes by selectively removing regions of the gate insulating layer and the interlayer insulating layer corresponding to the regions of the thin-film-transistor polycrystalline silicon semiconductor layer corresponding to the source electrode and the drain electrode, respectively, (j) forming a second electrode material film to contact the regions of the thin-film-transistor polycrystalline silicon semiconductor layer corresponding to the source electrode and the drain electrode, respectively, via the semiconductor-layer contact holes and to cover the interlayer insulating layer, (k) patterning the second electrode material film into the source electrode and the drain electrode, (l) forming a protective film to cover the source electrode, the drain electrode and the interlayer insulating layer, (m) selectively removing the protective film to open a source-electrode contact hole extending to the source electrode, (n) forming a pixel-electrode material film to contact the source electrode through the source-electrode contact hole and cover the protective film, and (o) patterning the pixel-electrode material film into a pixel electrode.
The above fabrication method provides liquid crystal display devices having an active matrix substrate including low-voltage high-speed thin film transistors, by reducing unevenness of the polycrystalline silicon semiconductor layer, making the insulating layer thinner and flattening the lateral distributions of impurity concentrations.
The above configurations provide liquid crystal display devices having an active matrix substrate including stable low-voltage high-speed thin film transistors. The various numerical limitations were obtained by the present inventors having carried out a large number of experiments.
The above fabrication provides liquid crystal display devices having an active matrix substrate including low-voltage high-speed thin film transistors, by reducing unevenness of the polycrystalline silicon semiconductor layer, making the insulating layer thinner and flattening the lateral distributions of impurity concentrations.
The present invention is not limited to the above configurations or embodiments described later, but various changes and modifications can be made to the above configurations and the embodiments without departing from the nature and spirit of the present invention.